PROJECT PROFILE: Georgia Tech Research Corp. (PVRD)

Project Name: Pushing the Efficiency Limit of Low-Cost, Industrially-Relevant Silicon Solar Cells by Advancing Cell Structures and Technology Innovations
Funding Opportunity: PVRD
SunShot Subprogram: Photovoltaics
Location: Atlanta, GA
SunShot Award Amount: $1,125,000
Awardee Cost Share: $125,000
Project Investigator: Ajeet Rohatgi

This project is advancing manufacturable silicon cell technologies to above 22% efficiency through the use of passivated selective emitter and selective back surface field (BSF) contact geometries. The improved contact and metallization methods investigated during the course of the project will reduce recombination and improve cell performance by up to 2% absolute efficiency. Multiple fabrication methodologies will be investigated to determine the most cost-effective method for producing the laterally patterned doping profiles needed to realize this high performance cell technology.

Approach

Currently, most industrial cells are limited to efficiencies of 21%, mainly because of high recombination in the heavily doped boron and phosphorus regions, high metal-induced recombination at metal/silicon interface, and high shading from wide screen-printed metal fingers on the front. This project aims to reduce those losses significantly by implementing a selective emitter, selective back surface field (BSF), and advanced metallization. A selective emitter will lead to reduced contact resistance as well as lower recombination, resulting in a higher open circuit voltage. The project will explore three different strategies to determine the most manufacturable and cost effective way of accomplishing this. The research team will also implement selective BSF in combination with fine line metallization and floating bus bars to extract the maximum benefit from selective emitter, leading to high open circuit voltages and high efficiencies.

Innovation

The project will integrate selective diffusion and contact technologies and apply them to fabricate cells on both n- and p-type wafers as well as epitaxially grown p+-n-n+ structures without any new process development. This will have a significant impact on the levelized cost of energy and create U.S. leadership in producing low-cost, high-efficiency cells. It will also allow rapid integration of the best capabilities and technologies to produce highest efficiency, best-in-class, commercial-ready cells. It will also produce a highly-trained workforce in the field of silicon PV.